We describe a current-mode circuit for Gabor-type image filtering which uses a differential representation where positive (on) and negative (off) signals are encoded using separate channels. Previous current-mode implementations represented positive and negative signals as variations around a constant bias at every pixel. However, this bias current has several disadvantages. First, variations in it introduce significant additive fixed pattern noise to the output. Second, it dissipates power even with zero input. Third, if the output is encoded using the Address Event Representation, the bias current sets up a quiescent firing rate which loads the bus. The architecture proposed here alleviates these problems since a zero signal is encoded as nearly zero current in both channels. On the other hand, the transistor count and the address space are doubled. Measurements from a 1 by 25 pixel array with a cell size of 64 μm by 540 μm was fabricated in the AMI 1.5 μm process available through MOSIS. Quiescent power dissipation was 5 μW total.