Cache-aware Interfaces for Compositional Real-Time Systems
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Departmental Papers (CIS)
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CPS Real-Time
Computer Engineering
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Computer Sciences
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Abstract
Interface-based compositional analysis is by now a fairly established area of research in real-time systems. However, current research has not yet fully considered practical aspects, such as the effects of cache interferences on multicore platforms. This position paper discusses the analysis challenges and motivates the need for cache scheduling in this setting, and it highlights several research questions towards cache-aware interfaces for compositional systems on multicore platforms.
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2015-12-01
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Departmental Papers (CIS)
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2023-05-17T14:48:58.000
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8th International Workshop on Compositional Theory and Technology for Real-Time Embedded Systems CRTS 2015 (http://www.mrtc.mdh.se/CRTS2015/) held in conjunction with 36th IEEE Real-Time Systems Symposium RTSS 2015 (http://www.rtss.org/), San Antonio, Texas, December 1-4, 2015