Departmental Papers (CIS)

Date of this Version

7-2012

Document Type

Conference Paper

Comments

From the 24th International Conference, CAV 2012, Berkeley, CA, USA, July 7-13, 2012.

Abstract

The growing complexity of hardware optimizations employed by multiprocessors leads to subtle distinctions among allowed and disallowed behaviors, posing challenges in specifying their memory models formally and accurately, and in understanding and analyzing the behavior of concurrent software. This complexity is particularly evident in the IBM® Power Architecture® , for which a faithful specification was published only in 2011 using an operational style. In this paper we present an equivalent axiomatic specification, which is more abstract and concise. Although not officially sanctioned by the vendor, our results indicate that this axiomatic specification provides a reasonable basis for reasoning about current IBM® POWER® multiprocessors.We establish the equivalence of the axiomatic and operational specifications using both manual proof and extensive testing. To demonstrate that the constraint-based style of axiomatic specification is more amenable to computer-aided verification, we develop a SAT-based tool for evaluating possible outcomes of multi-threaded test programs, and we show that this tool is significantly more efficient than a tool based on an operational specification.

Subject Area

CPS Formal Methods

Publication Source

Lecture Notes in Computer Science: Computer Aided Verification

Volume

7358

Start Page

495

Last Page

512

DOI

10.1007/978-3-642-31424-7_36

Copyright/Permission Statement

The original publication is available at www.springerlink.com

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Date Posted: 17 July 2012