Quattrone Nanofabrication Facility
The Quattrone Nanofabrication Facility (QNF), is an open access user facility that provides equipment resources and staff assistance for building devices and structures at the micro- and nanoscale. In addition to supporting academic research, we serve as a regional resource in welcoming all projects from other universities, industry and national laboratories.
PublicationQuantum Dots and QD-based Devices: Nanotechnology Enabled by Chemistry(2020-10-09) Watson, George Patrick; Watson, George Patrick PublicationAl (confocal) deposition rate 1 using Explorer14 magnetron sputterer(2015-04-27) Paliwal, Swapil; Paliwal, Swapil PublicationLayoutEditor Training: 11 - Move/Scale & Copy/Move(2019-11-19) Jones, David; Jones, David PublicationElionix ELS-7500EX Electron Beam Lithography Standard Operating Procedure(2022-05-01) Barth, David S; Barth, David S PublicationLayoutEditor Training: 05 - Selecting & Deleting Objects(2019-11-19) Jones, David; Jones, David PublicationABM Mask Aligner Video Tutorial(2016-03-01) Song, Joseph W; Song, Joseph WVideo tutorial of ABM mask aligner PublicationStatistical Process Control of Alignment Module of NX2600(2015-05-12) Yamamoto, Hiromichi; Yamamoto, Hiromichi PublicationReactive Ion Etch (RIE) of Silicon and ZEP520A Resist Mask with Tetrafluoromethane (CF4) Using Oxford 80 Plus(2016-05-12) Wood, Steven; Lopez, Gerald G; Metzler, Meredith; Wood, Steven; Lopez, Gerald G; Metzler, MeredithThis report discusses the results of etching silicon with electron beam lithography defined features in ZEP520A resist using CF4 in the Oxford 80 Plus RIE. PublicationOptimization of Bilayer Lift-Off Process to Enable the Gap Size of 1μm Using LOR 3A and S1813(2021-01-29) Suh, Yeonjoon; Watson, George Patrick; Suh, Yeonjoon; Watson, George PatrickBilayer lift-off process for 1μm feature size is demonstrated using LOR 3A and S1813 photoresist. The thickness of photoresists was fixed, whereas development time is varied. The process was further investigated by measuring the undercut depth and undercut rate by scanning electron microscopy. An optimized and reproducible recipe is provided. PublicationCharacterization and Optimization of Parylene-C deposition process using SCS Parylene coater(2019-01-15) Hastings, Hannah; Johnston, Eric D; Kim, Gyuseok; Hastings, Hannah; Johnston, Eric D; Kim, GyuseokParylene-C has been deposited on bare Si wafers by physical vapor deposition using the SCS Coating Systems. Results show a 12 µm thick Parylene-C ﬁlm with 10 g of dimer and negligible thickness variation across a wafer. We ﬁnd a positive linear relationship between ﬁlm thickness and mass of dimer at a range of 1 g to 18 g. However, the Al boat for dimer was burnt with 18 g of dimer, suggesting multiple depositions with 1 g to 10 g of dimer are recommended to achieve the Parylene-C ﬁlm thicker than 12 µm.