Departmental Papers (ESE)

Abstract

Floating-point arithmetic is notoriously non-associative due to the limited precision representation which demands intermediate values be rounded to fit in the available precision. The resulting cyclic dependency in floating-point accumulation inhibits parallelization of the computation, including efficient use of pipelining. In practice, however, we observe that floating-point operations are mostly associative. This observation can be exploited to parallelize floating-point accumulation using a form of optimistic concurrency. In this scheme, we first compute an optimistic associative approximation to the sum and then relax the computation by iteratively propagating errors until the correct sum is obtained. We map this computation to a network of 16 statically-scheduled, pipelined, double-precision floating-point adders on the Virtex-4 LX160 (-12) device where each floating-point adder runs at 296MHz and has a pipeline depth of 10. On this 16 PE design, we demonstrate an average speedup of 6× with randomly generated data and 3-7× with summations extracted from Conjugate Gradient benchmarks.

Document Type

Conference Paper

Date of this Version

June 2007

Comments

Copyright 2008 IEEE. Reprinted from Proceedings of the 18th IEEE International Symposium on Computer Arithmetic ARITH '07, pages 205-216.

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Keywords

floating-point addition, parallel prefix, optimistic parallelism

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Date Posted: 02 May 2008

This document has been peer reviewed.