Gruev, Viktor
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Publication A CMOS Linear Voltage/Current Dual-Mode Imager(2006-05-01) Gruev, Viktor; Yang, Zheng; Van der Spiegel, JanWe present a CMOS image sensor capable of both voltage- and current-mode operations. Each pixel on the image has a single transistor acting as either source follower for voltage readout, or transconductor for current readout. The two modes share the same readout lines, but have their own correlated double sampling (CDS) units for noise suppression. We also propose a novel current-mode readout technique using a velocity saturated short-channel transistor, which achieves high linearity. The 300x200 image array is a mixture of 3 types of pixels with identical photodiodes and access switches; while the readout transistors are sized for their designated mode of operation. This ensures a fair comparison on the performance of the different modes.Publication Linear Current-Mode Active Pixel Sensor(2007-11-01) Philipp, Ralf M; Gruev, Viktor; Orr, David; Van der Spiegel, Jan; Etienne-Cummings, RalphA current mode CMOS active pixel sensor (APS) providing linear light-to-current conversion with inherently low fixed pattern noise (FPN) is presented. The pixel features adjustable-gain current output using a pMOS readout transistor in the linear region of operation. This paper discusses the pixel’s design and operation, and presents an analysis of the pixel’s temporal noise and FPN. Results for zero and first-order pixel mismatch are presented. The pixel was implemented in a both a 3.3 V 0.35 µm and a 1.8 V 0.18 µm CMOS process. The 0.35 µm process pixel had an uncorrected FPN of 1.4%/0.7% with/without column readout mismatch. The 0.18 µm process pixel had 0.4% FPN after delta-reset sampling (DRS). The pixel size in both processes was 10 X 10 µm2, with fill factors of 26% and 66%, respectively.Publication Image Sensor with General Spatial Processing in a 3D Integrated Circuit Technology(2006-05-01) Gruev, Viktor; Van der Spiegel, Jan; Philipp, Ralf M.; Etienne-Cummings, RalphAn architectural overview of an image sensor with general spatial processing capabilities on the focal plane is presented. The system has been fabricated on two separate tiers, implemented on silicon-on-insulator technology with vertical interconnect capabilities. One tier is dedicated to imaging, where photosensitivity and pixel fill have been optimized. The subsequent layers contain noise suppression and digitally controlled analog processing elements, where general spatial filtering is computed. The digitally controlled aspect of the processing unit allows generic receptive fields to be computed on read out. The image is convolved with four receptive fields in parallel. The chip provides parallel readout of the filtered results and the intensity image.Publication Two Transistor Current Mode Active Pixel Sensor(2007-05-01) Gruev, Viktor; Van der Spiegel, Jan; Yang, Zheng; Etienne-Cummings, RalphA novel current mode active pixel sensor for high resolution imaging is presented. The photo pixel is composed of a photodiode and two transistors: reset and transconductance amplifier transistor. The switch transistor is moved outside the pixel, allowing for lower pixel pitch and increased linearity of the output photocurrent. The increased linearity of the image sensor has greatly reduced spatial variations across the image after correlated double sampling and the column fix pattern noise is 0.35% of the saturated current. A discussion on theoretical temporal noise limitations of this design is also presented.