Technical Reports (CIS)

Document Type

Technical Report

Date of this Version

April 2002


University of Pennsylvania Department of Computer and Information Science Technical Report No. MS-CIS-02-12. An earlier, conference version of this technical report may be found at


The paper describes a unified formal framework for designing and reasoning about power-constrained, timed systems. The framework is based on process algebra, a formalism which has been developed to describe and analyze communicating, concurrent systems. The proposed extension allows the modeling of probalistic resource failures, priorities of resource usages, and power consumption by resources within the same formalism. Thus, it is possible to study several alternative power-consumption behaviors and tradeoffs in their timing and other characteristics. This paper describes the modeling and analysis techniques, and illustrates them with examples, including a dynamic voltage-scaling algorithm.



Date Posted: 04 August 2005