Departmental Papers (ESE)

Document Type

Journal Article

Date of this Version

7-16-2009

Comments

Suggested Citation:
Gruev, V., Yang, Z. and Van der Spiegel, J. (2009). "Low-power reduced transistor image sensor." Electronic Letters Vol. 45(15).

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Abstract

An image sensor comprising an array of 128 by 50 super pixels, column parallel current conveyors and global difference double sampling (DDS) unit is presented. The super pixel consists of: a reset transistor, a readout transistor, four transfer transistors and four photodiodes. The photo pixel address switch is placed outside the pixel, effectively implementing 1.5 transistors per pixel using a sharing scheme of the readout and reset transistor. The column FPN of 0.43% from saturated level and SNR of 43.9 dB is measured. The total power consumption is 5 mW at 30 frame/s.

Date Posted: 22 December 2010

This document has been peer reviewed.