Simulation of Simultaneous Events in Regular Expressions for Run-Time Verification

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Departmental Papers (CIS)
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Run-time verification
regular expressions
temporal logic
dependency graph
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Sammapun, Usa
Easwaran, Arvind
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When specifying system requirements, we want a language that can express the requirements in the simplest and most intuitive form. Although the MaC system provides an expressive language, called MEDL, it is generally awkward to express certain features like temporal ordering of complex events, timing constraints, and frequencies of events which are inherent in safety properties. MEDL-RE extends the MEDL language to include regular expressions to easily specify timing dependencies and timing constraints. Due to simultaneous events generated by the MaC system, monitoring regular expressions by simulating DFAs would result in a potential problem. The DFA simulations would involve concurrent multi-path simulations and result in exponential running time. To handle simultaneous events inexpensively, we generate a dependency graph to identify possible simultaneous events. Further, we augment the original DFAs with alternative transitions, which will substitute for multi-path simulations.

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2004-04-03
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Departmental Papers (CIS)
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2023-05-16T22:25:13.000
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Postprint version. Published in Electronic Notes in Theoretical Computer Science, Volume 113, 3 January 2005, pages 123-143, Proceedings of the Fourth Workshop on Runtime Verification (RV 2004). Publisher URL: http://dx.doi.org/10.1016/j.entcs.2004.01.030
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