Departmental Papers (CIS)
Title
Formal Modeling and Analysis of Power-Aware Real-Time Systems
Document Type
Conference Paper
Date of this Version
December 2001
Abstract
The paper describes a unified formal framework for designing and reasoning about power-constrained, timed systems. The framework is based on process algebra, a formalism which has been developed to describe and analyze communicating, concurrent systems. The proposed extension allows the modeling of probilistic resource failures and power consumption by resources within the same formalism. Thus, it is possible to study several alternative power-consumption behaviors and tradeoffs in their timing and other characteristics. This paper describes the modeling and analysis techniques, and illustrates them with examples, including a power-aware ad-hoc network protocol.
Download
Date Posted: 25 May 2005
This document has been peer reviewed.
Comments
Proceedings of IEEE/IEE Workshop on Real-Time Embedded Systems 2001 (RTES 2001), held directly before the 22nd IEEE Real-Time Systems Symposium 2001 (RTSS 2001).