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High performance ambipolar silicon nanowire (SiNW) transistors were fabricated. SiNWs with uniform oxide sheath thicknesses of 6–7 nm were synthesized via a gas-flow-controlled thermal evaporation method. Field effect transistors (FETs) were fabricated using as-grown SiNWs. A two step annealing process was used to control contacts between SiNW and metal source and drain in order to enhance device performance. Initially ρ-channel devices exhibited ambipolar behavior after contact annealing at 400 ºC. Significant increases in on/off ratio and channel mobility were also achieved by annealing.
annealing, silicon, elemental semiconductors, nanowires, field effect transistors
Byon, K., Tham, D., Fischer, J. E., & Johnson, A. T. (2007). Systematic study of contact annealing: Ambipolar silicon nanowire transistor with improved performance. Retrieved from https://repository.upenn.edu/mse_papers/130
Date Posted: 18 May 2007
This document has been peer reviewed.