Emerging non-volatile memories (NVMs) such as RRAM, PCM, and MRAM promise significant benefits in speed, density, and energy efficiency, but current simulation tools often misrepresent their behavior. Industry relies on proprietary flows, while widely used academic tools like NVSim apply SRAM-centric delay models (e.g., Seevinck precharge RC), which fail to capture current-mode sensing and amplifier-driven dynamics in resistive memories. This work develops a Python-based, object-oriented NVM simulator designed for extensibility and accuracy across diverse memory types. By treating memory cell type as a parameter, the tool incorporates amplifier-aware models to replace legacy delay assumptions and enables exploration of design trade-offs. Instead of reporting a single “optimized” configuration, the simulator generates Pareto frontiers spanning latency, energy, and area, allowing architects to align designs with application-specific goals. This open-source platform bridges the gap between proprietary foundry tools and academic needs, advancing benchmarking, teaching, and research in memory system design.