Systematic study of contact annealing: Ambipolar silicon nanowire transistor with improved performance
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annealing
silicon
elemental semiconductors
nanowires
field effect transistors
silicon
elemental semiconductors
nanowires
field effect transistors
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High performance ambipolar silicon nanowire (SiNW) transistors were fabricated. SiNWs with uniform oxide sheath thicknesses of 6–7 nm were synthesized via a gas-flow-controlled thermal evaporation method. Field effect transistors (FETs) were fabricated using as-grown SiNWs. A two step annealing process was used to control contacts between SiNW and metal source and drain in order to enhance device performance. Initially ρ-channel devices exhibited ambipolar behavior after contact annealing at 400 ºC. Significant increases in on/off ratio and channel mobility were also achieved by annealing.
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2007-04-05
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Copyright (2007) American Institute of Physics. This article may be downloaded for personal use only. Any other use requires prior permission of the author and the American Institute of Physics. Reprinted in Applied Physics Letters, Volume 90, Article 143513, April 5, 2007, 3 pages. Publisher URL: http://dx.doi.org/:10.1063/1.2720309