Departmental Papers (MSE)

Document Type

Conference Paper

Date of this Version

November 2001

Comments

Copyright Materials Research Society. Reprinted from MRS Proceedings Volume 699.
2001 Fall Meeting Symposium R
Electrically Based Microstructural Characterization III
Publisher URL:http://www.mrs.org/members/proceedings/fall2001/r/R1_2.pdf

Abstract

Impedance spectroscopy has long been recognized as one of the major techniques for the characterization of ac transport in materials. The primary limitation of this technique is the lack of spatial resolution that precludes the equivalent circuit elements from being unambiguously associated with individual microstructural features. Here we present a scanning probe microscopy technique for quantitative imaging of ac and dc transport properties of electrically inhomogeneous materials. This technique, referred to as Scanning Impedance Microscopy (SIM), maps the phase and amplitude of local potential with respect to an electric field applied across the sample. Amplitude and phase behavior of individual defects can be correlated with their transport properties. The frequency dependence of the voltage phase shift across an interface yields capacitance and resistance. SIM of single interfaces is demonstrated on a model metal-semiconductor junction. The local interface capacitance and resistance obtained from SIM measurements agrees quantitatively with macroscopic impedance spectroscopy. Superposition of a dc sample bias during SIM probes the C-V characteristics of the interface. When combined with Scanning Surface Potential Microscopy (SSPM), which can be used to determine interface I-V characteristic, local transport properties are completely determined. SIM and SSPM of polycrystalline materials are demonstrated on BiFeO3 and p-doped silicon. An excellent agreement between the properties of a single interface determined by SIM and traditional impedance spectra is demonstrated. Finally, the applicability of this technique for imaging transport behavior in nanoelectronic devices is illustrated with carbon nanotube circuit.

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Date Posted: 05 November 2004

This document has been peer reviewed.