Date of this Version
This paper presents a sampling technique with reduced distortion for use in a sample-and-hold circuit for high resolution analog-to-digital converters and switched capacitor filters. The technique involves bootstrapping both the gate and the bulk terminal of the sampling switch to improve linearity. Circuit implementation and SPICE level simulation results are presented.
sampling, analog-digital conversion, bootstrapping, distortion
Sonkusale, Sameer R. and Van der Spiegel, Jan, "A Low Distortion MOS Sampling Circuit" (2002). Departmental Papers (ESE). Paper 57.
Date Posted: 24 November 2004
This document has been peer reviewed.