Departmental Papers (ESE)

Document Type

Conference Paper

Date of this Version

May 2006

Comments

Copyright 2006 IEEE. Reprinted from Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS) 2006, May 2006, pages 2769-2772.

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Abstract

A nonlinear interconnection module for a corticonic network is designed and fabricated in a 0.6µm CMOS process. The module uses NMOS transistors in weak-inversion for nonlinearity. A calibration scheme is developed to compensate for the process and temperature variations of the circuit. The designed module has an area of 0.35 sq. mm2. It consumes 200mW of power, with 5V power supply. Simulation results show that the circuit is able to implement the target parametric coupling function accurately.

Keywords

corticonic network, cortical patch, nonlinear interconnection

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Date Posted: 27 June 2007

This document has been peer reviewed.