Departmental Papers (ESE)
Document Type
Journal Article
Date of this Version
December 2005
Abstract
A compact CMOS vision sensor for the detection of higher level image features, such as corners, junctions (T-, X-, Y-type) and linestops, is presented. The on-chip detection of these features significantly reduces the data amount and hence facilitates the subsequent processing of pattern recognition. The sensor performs a series of template matching operations in an analog/digital mixed mode for various kinds of image filtering operations including thinning, orientation decomposition, error correction, set operations, and others. The analog operations are done in the current domain. A design procedure, based on the formulation of the transistor mismatch, is applied to fulfill both accuracy and speed requirements. The architecture resembles a CNN-UM that can be programmed by a 30-bit word. The results of an experimental 16x16 pixel chip demonstrate that the sensor is able to detect features at high speed due to the pixel-parallel operation. Over 270 individual processing operations are performed in about 54 µsec.
Keywords
feature detection, vision sensor, smart sensor, computational sensor, template-matching, transistor mismatch
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Date Posted: 02 August 2006
This document has been peer reviewed.
Comments
Postprint version. Published in Analog Integrated Circuits and Signal Processing, Volume 45, Issue 3, December 2005, pages 263-279. The original publication is available at www.springerlink.com.
Publisher URL: http://dx.doi.org/10.1007/s10470-005-4955-x