Departmental Papers (ESE)

Document Type

Journal Article

Date of this Version

8-1-2005

Comments

Copyright 2005 IEEE. Reprinted from IEEE Transactions on Circuits and Systems--I: Regular Papers, Volume 52, Issue 8, August 2005, pages 1535-1544.

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Abstract

A systematic design methodology for high-performance gain-boosted opamps (GBOs) is presented. The methodology allows the optimization of the GBO in terms of ac response and settling performance and is incorporated into an automatic computer-aided design (CAD) tool, called GBOPCAD. Analytic equations and heuristics are first used by GBOPCAD to obtain a sizing solution close to the global optimum. Then, simulated annealings are used by GBOPCAD to find the global optimum. A sample opamp is designed by this tool in a 0.6-μm CMOS process. It achieves a dc gain of 80 dB, a unity-gain bandwidth of 836 MHz with 60o phase margin and a 0.0244% settling time of 5 ns. The sample/hold front-end of a 12-bit 50-MSample/s analog–digital converter was implemented with this opamp. It achieves a signal-to-noise ratio of 81.9 dB for a 8.1-MHz input signal.

Keywords

doublet, equation based, gain boost, gain-boosted opamp, computer-aided design (GBOPCAD), global optimum, stability, high-speed opamp, opamp synthesis, sample/hold (S/H), front-end, simulated annealing (SA)

Date Posted: 21 August 2005

This document has been peer reviewed.