Departmental Papers (BE)

Document Type

Conference Paper

Date of this Version

May 2001

Comments

Copyright 2001 IEEE. Reprinted from Proceedings of the IEEE International Symposium on Circuits and Systems 2001 (ISCAS 2001), Volume 3, pages III-505 - III-508.
Publisher URL: http://ieeexplore.ieee.org/xpl/tocresult.jsp?isNumber=19927&page=8

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Abstract

An 80 x 60 pixels arbitrated address-event imager has been designed and fabricated in a 0.6 μm CMOS process. The value of the intensity is inversely proportional to the inter-spike interval and the read-out of each spike is initiated by the pixel. The available output bandwidth is allocated according to the pixel's demand, favoring brighter pixels and minimizing power consumption. The imager has a large dynamic range: 200dB for an individual pixel. The array has a dynamic range of 120dB. The power consumption is 3.4mW in uniform indoor light and a mean event rate of 200KHz (41.7 effective fps). The imager is capable of 8.3K effective fps.

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Date Posted: 10 November 2004

This document has been peer reviewed.